Research Areas
The Make Programming Simple (MPS) Lab focuses on advancing computational methods and technologies to simplify programming and enhance system performance across diverse domains.
Active Research
Machine Learning Acceleration
Hardware-software co-design and architectural innovations for efficient, high-performance execution of deep learning models on specialized accelerators and edge devices.
Intelligent Transportation Systems
Developing robust software, perception pipelines, and safety-critical architectures for next-generation intelligent and autonomous vehicles.
AI-driven Multi-Level Compilers
Leveraging machine learning techniques to optimize compiler designs, creating intelligent intermediate representations for emerging and heterogeneous architectures.
Quantum Machine Learning
Pioneering the next generation of artificial intelligence by exploring the intersection of quantum computing and advanced machine learning models.
Extended Research
Reliability for Machine Learning
Ensuring the dependability and predictable performance of machine learning systems in the presence of hardware faults and adversarial conditions.
GPU Computing
With higher performance and better power efficiency, GPU (Graphics Processing Unit) has enabled so-called ‘supercomputing to the masses’. However, the complex memory hierarchy and various architect...
Cyber-Physical and IoT Systems
Time is a foundational aspect of Cyber-Physical Systems (CPS). Correct timing of system events is critical to optimize responsiveness to the environment, in terms of timeliness, accuracy, and preci...
Software Managed Manycore (SMM)
Multicore with Software Programmable Memory
Software Branch Hinting
As power-efficiency becomes the paramount concern in processor design, architectures are coming up that completely do away with hardware branch prediction, and rely solely on software branch hintin...
Coarse-Grain Reconfigurable Arrays
Need for faster and power-efficient processors has paved the way for many-core processors along with considerable research in accelerators. Acceleration through popular Graphics Processing Units (G...
Power, Temperature and Variation aware Computing
Power consumption, process variations, and temperature are all problems due to technology scaling to incredible levels. Our approach to deal with power, temperature and process variations is to exp...
Bypass Aware Compiler
Code size is an important constraint for many embedded systems, especially the ones in which the code is burnt on ROMs, which can be the major component on the chip. Dual instruction set, one compo...
Reduced bit-width Instruction Set Architecture
Code size is an important constraint for many embedded systems, especially the ones in which the code is burnt on ROMs, which can be the major component on the chip. Dual instruction set, one compo...
Real-Time Systems
Our vision:Our vision is to enable correct-by-construction cyber-physical system design using software-managed memory hierarchies with our efficient memory management schemes and accurate analysis ...
LLM Applications
Research on llm applications at the MPS Lab.
Processor Idle Cycle Aggregation
During execution, a processor is typically stalled for a significant amount of time doing nothing, but waiting for data from memory. However, these stall durations are typically small. Our research...